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数位 IC 设计工程师
Logo of CakeResume Headhunting Recruitment Service.
1. ASIC Design or IP Integration 2. Familiar with Digital front-end EDA tool.
IP Integration
IP Design
Digital IC
180万 ~ 250万 TWD / 年
需具备 3 年以上工作经验
不需负担管理责任
Logo of 宏正自動科技股份有限公司.
研發工程師,與我們一同開創科技趨勢新局! 【工作內容】 As a IC Design Engineer, you will design, implement and verify products that use FPGAs and/or ASICs. 1. Participate in the micro architecture and design partition within the FPGAs and/or ASICs and implement design blocks using Verilog. 2. Participate in all phases of FPGA/ASIC design Flow (Synthesis, Place
4万 ~ 8万 TWD / 月
不限年资
不需负担管理责任
Logo of 浦飛爾科技有限公司.
1.Familiar with RTL design & simulation 2.Familiar with FPGA prototype & emulation 3.Familiar with Verilog coding & ASIC design flow 4.Familiar with Analog and digital co-simulation 5.Familiar with Design documentation 6.Experience in MCU 7.Experience in ADC/DAC is a plus 8.Experience in low poer design flow is a plus 孰悉以下工具: 熟悉 Verilog coding, 與 ASIC design flow 熟悉
78万 ~ 234万 TWD / 年
不需负担管理责任

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