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負責 高速 PLL 以及 Serdes 相關類比電路開發。 設計PCIe/USB/SATA相關APHY serdes電路,例如:USB4、PCIe5、25G serdes
ADC/DAC/Serds/PLL/LDO/BG/DP/HDMI/USB
USB4、PCIe5、25G serdes
PLL
2.5M ~ 4.5M TWD / year
3 years of experience required
No management responsibility
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專長是Class D Amp IP設計的類比IC設計人員協助產品研發, 且相關設計/產品經驗有 10 年以上 。 工作內容: 1. 負責HV Class D Amp新產品的評估, 包含前期的面積評估, 製程比較, 2. 以及中期的Class D Amp IP
Analog Design
Analog IC
Class-D
3M ~ 5M TWD / year
6 years of experience required
No management responsibility
Logo of 凌耀科技股份有限公司.
1. Sensor IC/ Mixed Signal IC Design, Verification, Design/Verification related documents writing: -Familiar with Hspice, Matlab simulation tools. -Familiar with ADC/DAC, Bandgap, Regulator, Filter, and so on related IP design is preferred. -Interesting in Ambient light sensor, Proximity sensor, Long wave length Infrared sensor, Humidity sensor design is preferred. -Familiar with basic semiconductor process is preferred. 2. Support Mass Production Testing 3. Design Document/Report Support
26.4K ~ 26.4K TWD / month
5 years of experience required
No management responsibility
Logo of 力旺電子 eMemory.
記憶體電路開發設計(Array, Decoding, Sense Amplifier等電路) 3. 消費性、物聯網與車用電子之非揮發性記憶體電路整合開發設計 --------------------------------------------------------------------------------------------- Our Design Team is responsible for NVM (Non-Volatile Memory) IC circuit design. As an Analog Circuit Design Engineer, your responsibilities include: 1. Design, verify and debug analog circuits ( Bandgap, LDO, Charge Pum
40K+ TWD / month
No requirement for relevant working experience
No management responsibility
Logo of 多方科技股份有限公司.
工作職責 (Responsibilities): Build & innovate on high-speed analog/mixed-signal circuits such as PCIe/DDR/HDMI... transmitter and receiver in deep sub-micron CMOS technology for integration in SoC products. Work with digital team on specification definition Create behavior model for analog/digital evaluation Compliance test for SerDes IP
Linus
2.5M ~ 4.5M TWD / year
1 years of experience required
No management responsibility
Logo of Alpha & Omega Semiconductor (Taiwan) Ltd. .
1) DCDC Power IC design 2) Over 3~5 years experience in design house. power management is a must. 3) Review colleague's projects and own projects.
2M ~ 3M TWD / year
No management responsibility
Logo of Ali Tech.
1.高速介面(SerDes)類比電路設計 2.Circuit design of CTLE/CDR/DFE/PLL/TX 3.Familiar with SerDes and DDR PHY architecture (ex: PCIe3 / USB3 / HDMI2 / DDR4 / LPDDR4/4x ...etc)
C++
FPGA
PLL
1.8M ~ 2.3M TWD / year
No management responsibility
Logo of 通嘉科技 Leadtrend.
【工作內容】 1. 負責類比電源IC之設計/模擬/驗證/除錯 2. 管控類比電源IC之設計/模擬/驗證/除錯..等流程,追蹤相關流程進度 3. 撰寫各設計流程之設計/除錯分析報告 *意
60K+ TWD / month
No management responsibility
Logo of 力智電子股份有限公司.
1. High speed SAR ADC design (>200Msps) 2. High resolution SAR ADC design (14/16-bit) 3. Pipiline ADC design
台元科技園區
55K ~ 80K TWD / month
No management responsibility
Logo of CakeResume Headhunting Recruitment Service.
Lead the design of NAND flash IO circuits, ensuring optimal performance and reliability. Demonstrate proficiency in basic analog circuit design concepts, including LDO, DCDC, BANDGAP, Voltage Detector, PLL, ADC, etc. Collaborate in conducting fail sample analysis and contribute to IC measurements to identify and address potential issues. If you have experience in NAND flash IO circuit design, a strong foundation in analog circuit design, and skills in fail sample analysis and IC measurement, we
2M ~ 4M TWD / year
5 years of experience required
No management responsibility

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