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Logo of OTSO FINTECH黑森科技股份有限公司.
【我們是誰?】 我們是黑森科技 OTSO Fintech ,是金融科技新創公司,主力於提供各式數位科技解決方案、流動性提供商、一站式金融資諮詢服務、數據演算分析,我們正處於高速發展期,服務範圍涵蓋傳統以及
50萬 ~ 70萬 TWD / 年
不限年資
不需負擔管理責任
Logo of 鴻海科技集團-鴻佰科技股份有限公司 (土城).
工作內容: 鴻海集團-AI Server 雲運算產品事業群 (CESBG)校園招募-2023 實習生&新幹班計劃 • 鴻海集團 Fii 雲運算產品事業群提供有志朝產業發展的同學實習之工作機會。 • 同學將與專業團隊一起工作學習,以得
+土城區
+土城工業區
190 ~ 210 TWD / 小時
不限年資
不需負擔管理責任
Logo of ASML Taiwan 台灣艾司摩爾.
Job Title SS&P - Cost Engineer for Asia Degree: Bachelor, Master Work Experience: 4-9 years Travel: 25% Workplace Types: Hybrid Job Description: To take cost engineer functions for SS&P Asia, including SEA, Taiwan, China, South Korea and Japan 1. Cost analysis and validation to help commercial negotiation 2. Cost workshop, to identify opportunities and drive down cost 3. Cost education, to train our employees (not just sourcing leads) to increase cost knowledge 4. DST
經常性薪資達 NT$40,000
不限年資
不需負擔管理責任
Logo of CakeResume Headhunting Recruitment Service.
Responsibilities: As an Embedded Software Developer, you'll be a key player in software development, focusing on building, testing, and deploying software for our embedded payments platforms. Collaboration is essential, involving teams from hardware manufacturing to Android app development and external vendors for hardware selection. Key Tasks: Design, develop, and maintain user interfaces and underlying functionality for embedded point-of-sale software, ensuring secure payment processing across
C
C++
200萬 ~ 400萬 TWD / 年
需具備 3 年以上工作經驗
不需負擔管理責任
Logo of CakeResume Headhunting Recruitment Service.
1. SoC level and IP level verification methodology 2. Develop a verification plan and Integrated verification environment 3. Integrate VIP into the SOC verification platform.
UVM
Verification
PCIe
200萬 ~ 400萬 TWD / 年
需具備 5 年以上工作經驗
不需負擔管理責任
Logo of CakeResume Headhunting Recruitment Service.
Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.
UVM
Verilog
RTL
200萬 ~ 400萬 TWD / 年
需具備 3 年以上工作經驗
不需負擔管理責任
Logo of CakeResume Headhunting Recruitment Service.
Lead the design of NAND flash IO circuits, ensuring optimal performance and reliability. Demonstrate proficiency in basic analog circuit design concepts, including LDO, DCDC, BANDGAP, Voltage Detector, PLL, ADC, etc. Collaborate in conducting fail sample analysis and contribute to IC measurements to identify and address potential issues. If you have experience in NAND flash IO circuit design, a strong foundation in analog circuit design, and skills in fail sample analysis and IC measurement, we
200萬 ~ 400萬 TWD / 年
需具備 5 年以上工作經驗
不需負擔管理責任
Logo of CakeResume Headhunting Recruitment Service.
Lead the top-level integration of analog IPs, encompassing projects related to SSD, UFS, eMMC, SD, and more. Demonstrate a solid understanding of basic analog circuit design concepts, including but not limited to LDO, DCDC, BANDGAP, Voltage Detector, PLL, ADC, etc. Assist in conducting fail sample analysis and perform IC measurements to contribute to the identification and resolution of issues. If you have a background in analog IP integration, possess a strong grasp of analog circuit design
200萬 ~ 400萬 TWD / 年
需具備 3 年以上工作經驗
不需負擔管理責任
Logo of CakeResume Headhunting Recruitment Service.
進行PCB的層層堆疊阻抗設計及SI/PI模擬分析。 撰寫版面設計指南並執行版面品質檢查。 審核並排除訊號量測問題
SIPI
signal&power integrity
Signal Integrity
120萬 ~ 280萬 TWD / 年
需具備 2 年以上工作經驗
不需負擔管理責任
Logo of Wacom Taiwan Information Co., Ltd.台灣和冠資訊科技股份有限公司.
Job Purpose Responsible for quality evaluation of products at the prototype stage or after mass production, Windows HLK, and always maintains the quality of Technology Solution products at a constant high level. Also provide advice and support to ensure that the engineering team satisfy its quality evaluation standards and Windows HLK requirements. Key Responsibilities: ・Work closely with engineers to evaluate and analyse the quality of developed products at the prototype and mass production sta
excel
microsoft office
word
90萬 ~ 150萬 TWD / 年
需具備 3 年以上工作經驗
不需負擔管理責任

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