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This internship shall last at least 4 months at full-time or 2-4 days per week part-time. Please make sure you will be able to complete this period before sending your application. * Studying and developing RTL code using Verilog to accelerate kernels for Big Data platforms * System debug & Validation of FPGA prototype systems * Performance analysis and tuning of workloads on heterogeneous platform

* Design and develop RTL for Big Data platform. * Defines and documents RTL changes required for emulation/FPGA. * Tests and debugs the emulation/FPGA model and collaterals. * Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform. *You will join a growing team of IC design engineering professionals and have a real opportunity to have your hardware solutions embraced and to demonstrate your coaching and mentoring skills

Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.

1. 具Bluetooth系統設計分析 2. Bluetooth產品設計專案規劃 3. 專案開發技術指導 4. 客戶參訪，技術方案支持及推廣

1. SoC level and IP level verification methodology 2. Develop a verification plan and Integrated verification environment 3. Integrate VIP into the SOC verification platform.

1.Front-End/Modem (Baseband) Architecture Design for WiFi6/BT/BLE systems; 2.Optimization of Frontend/Modem circuits and simulation/verifications; 3.Digital Circuit Design and Verification – RTL Coding/Synthesis/STA/…

1. Assist customers in product development, problem analysis and technical solutions, eg. review schematic and layout 2. Responsible for project technical support of related product lines to assist customers in the smooth introduction of mass production; 3. Assist business to develop product application market; 4. Solve customer problems and meet customer needs; 5. Actively participate in team collaboration and achieve common goals of the team.

* Design and develop OpenCL/HLS/CUDA algorithms for HPC platform. * Defines and documents OpenCL/HLS/CUDA algorithms required for emulation/FPGA. * Tests and debugs the emulation/FPGA model and collaterals. * Develops improvements to usability by digital circuit validation and debugging of failing tests on the emulation platform. *You will join a growing team of digital IC design engineering professionals and have a real opportunity to have your hardware solutions

1.Familiar with RTL design & simulation 2.Familiar with FPGA prototype & emulation 3.Familiar with Verilog coding & ASIC design flow 4.Familiar with Analog and digital co-simulation 5.Familiar with Design documentation 6.Experience in MCU 7.Experience in ADC/DAC is a plus 8.Experience in low poer design flow is a plus 孰悉以下工具: 熟悉 Verilog coding, 與 ASIC design flow 熟悉