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• 面板驅動IC 或 SoC 設計

1. ASIC Design or IP Integration 2. Familiar with Digital front-end EDA tool.

參與SSD韌體專案開發，進行硬體控制器的設計和實現，以達到高性能和高可靠性的要求。 參與新功能的研發並進行性能評估，確保SSD韌體的不斷優化。 與HW Engineer 密切合作確保專案順利執行。

1. Facilitate collaboration between foundries and teams in Japan or Taiwan. 2. Maintain seamless communication channels with foundries regarding CP/FT-related updates. 3. Track product yield performance across various technologies and provide reports to headquarters. 4. Collaborate with headquarters and foundries to identify strategies for improving product yield. 5. Troubleshoot issues during mass production and collaborate with headquarters and foundries to sustain yield levels. 6. Gather tech

面板驅動IC或SOC設計 影像處理與影像壓縮設計 高速介面數位控制(如MIPI/ISP等)

工作內容 Knowledge of System Verilog, digital simulation and debug. Exposure to UVM is desired. Familiar with USB design is a plus. DV Experience: 6~10 years 薪資架構 13個月計算, RSU 另計

負責 高速 PLL 以及 Serdes 相關類比電路開發。 設計PCIe/USB/SATA相關APHY serdes電路，例如：USB4、PCIe5、25G serdes

1. Sensor IC/ Mixed Signal IC Design, Verification, Design/Verification related documents writing: -Familiar with Hspice, Matlab simulation tools. -Familiar with ADC/DAC, Bandgap, Regulator, Filter, and so on related IP design is preferred. -Interesting in Ambient light sensor, Proximity sensor, Long wave length Infrared sensor, Humidity sensor design is preferred. -Familiar with basic semiconductor process is preferred. 2. Support Mass Production Testing 3. Design Document/Report Support

1.Micro-architecture / RTL design, simulation and verification 2.Chip integration, algorithm implementation or interface design. 3.Familiar CDC, synthesis, formality and STA flow 4. Familiar with FPGA integration, synthesis and verification. 5. Familiar with USB/ High-speed IO related project design is a plus

【工作內容】 1. SoC level and IP level verification methodology 2. Develop a verification plan and Integrated verification environment 3. Integrate VIP into the SOC verification platform.