TSMC product engineer (Device team), involved in FinFET tech, such as N5/ N12/ N16.
Specialize in WAT analysis, be able to logically identify potential electrical problems.
In addition, I have good communication skills and rich experience in X-dep. work.
Extremely interested in companies located in Taipei/Hsinchu or the USA.
Aug 2020 - Present · 1 yr 5 m, Tainan City, Taiwan
• N5 mass production owner by WAT analysis, find out the potential electrical abnormality.
• Device (RO%) boost by Speed/Iddq/Vts/Isat/DIBL/LC/SC/Sws tracking analysis.
• Customer handling, ex: HPC Project/ S2S/ Wafer uniformity improvement (IDU/VtU/SPU)/ S2S.
• Yield analysis (Mbist/ LVccmin/ IDS/ Repair/ Chain scan) to develop the yield loss spec.
• SPICE model setting/ corner skew methodology (FF/SS/FS/SF).
• Capacity improvement (WPH) check with the integration team.
• Reliability (RA) improvement (HTOL/ TDDB) BKM check with QR team.
Sep. 2018 - July 2020
• N12/ N16 mass production (MP) owner by WAT analysis.
• Support Nanjing fab (F16) MP and NTO ramp-up/ RTO/ Corner split provider.
• Customer handling: RO%/Speed/Iddq boost by tuning process, like Poly/Fin/ EPI/ Metal gate.
• N12/16 SPICE model setting: propose a reasonable SPICE target by estimating the future silicon.
• Co-work with TDID and SPICE model team to set up SPICE.
• Deeply understand the correlation between inline (process) and WAT index.
2015 - 2018
2011 - 2015
TSMC product engineer (Device team), involved in FinFET tech, such as N5/ N12/ N16.
Specialize in WAT analysis, be able to logically identify potential electrical problems.
In addition, I have good communication skills and rich experience in X-dep. work.
Extremely interested in companies located in Taipei/Hsinchu or the USA.
Aug 2020 - Present · 1 yr 5 m, Tainan City, Taiwan
• N5 mass production owner by WAT analysis, find out the potential electrical abnormality.
• Device (RO%) boost by Speed/Iddq/Vts/Isat/DIBL/LC/SC/Sws tracking analysis.
• Customer handling, ex: HPC Project/ S2S/ Wafer uniformity improvement (IDU/VtU/SPU)/ S2S.
• Yield analysis (Mbist/ LVccmin/ IDS/ Repair/ Chain scan) to develop the yield loss spec.
• SPICE model setting/ corner skew methodology (FF/SS/FS/SF).
• Capacity improvement (WPH) check with the integration team.
• Reliability (RA) improvement (HTOL/ TDDB) BKM check with QR team.
Sep. 2018 - July 2020
• N12/ N16 mass production (MP) owner by WAT analysis.
• Support Nanjing fab (F16) MP and NTO ramp-up/ RTO/ Corner split provider.
• Customer handling: RO%/Speed/Iddq boost by tuning process, like Poly/Fin/ EPI/ Metal gate.
• N12/16 SPICE model setting: propose a reasonable SPICE target by estimating the future silicon.
• Co-work with TDID and SPICE model team to set up SPICE.
• Deeply understand the correlation between inline (process) and WAT index.
2015 - 2018
2011 - 2015