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4 到 6 年
6 到 10 年
10 到 15 年
15 年以上
Avatar of Kuan-Ting Chen.
Avatar of Kuan-Ting Chen.
Principal Engineer @TSMC
2021 ~ 現在
半年內
Kuan-Ting Chen Physical design engineer with 10 years of experience working in the semiconductors industry. Skilled in cell-based ASIC/SoC implementation and power integrity (EM/IR) analysis methodology, especially for advanced nodes (7/6/5/4/3nm). Familiar with Tcl/Perl scripting and design automation. Coordinate technical support and customer engagement with close collaboration with EDA vendors. Organize technological education to partners/customers. Fluent in Mandarin and English (TOEFL: 105/120). [email protected], Taiwan Engineering Skills PHYSICAL DESIGN
Physical Design
ASIC
System On A Chip
就職中
目前沒有興趣尋找新的機會
全職 / 對遠端工作有興趣
6 到 10 年
National Chiao Tung University
Electronics Engineering

最輕量、快速的招募方案,數百家企業的選擇

搜尋履歷,主動聯繫求職者,提升招募效率。

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搜尋技巧
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嘗試搜尋最精準的關鍵字組合
資深 後端 php laravel
如果結果不夠多,再逐一刪除較不重要的關鍵字
2
將須完全符合的字詞放在雙引號中
"社群行銷"
3
在不想搜尋到的字詞前面加上減號,如果想濾掉中文字,需搭配雙引號使用 (-"人資")
UI designer -UX
免費方案僅能搜尋公開履歷。
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職場能力評價定義

專業技能
該領域中具備哪些專業能力(例如熟悉 SEO 操作,且會使用相關工具)。
問題解決能力
能洞察、分析問題,並擬定方案有效解決問題。
變通能力
遇到突發事件能冷靜應對,並隨時調整專案、客戶、技術的相對優先序。
溝通能力
有效傳達個人想法,且願意傾聽他人意見並給予反饋。
時間管理能力
了解工作項目的優先順序,有效運用時間,準時完成工作內容。
團隊合作能力
具有向心力與團隊責任感,願意傾聽他人意見並主動溝通協調。
領導力
專注於團隊發展,有效引領團隊採取行動,達成共同目標。
超過一年
Master Student @ NTHU
A Siemens Business
2018 ~ 2018
Hsinchu, East District, Hsinchu City, Taiwan
專業背景
目前狀態
求職階段
專業
數據工程師
產業
軟體
工作年資
1 到 2 年
管理經歷
技能
VLSI CAD
Machine Learning Algorithms
Reinforcement Learning
Deep learning with TensorFlow
IC testing issue analysis and solve
VLSI design and automation
語言能力
求職偏好
希望獲得的職位
Machine Learning Engineer
預期工作模式
全職
期望的工作地點
遠端工作意願
接案服務
學歷
學校
National Tsing Hua University
主修科系
MASTERS IN ELECTRICAL ENGINEERING DEPARTMENT
列印
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Akash Singh 阿卡什

Enthusiastic Master Student and experienced Software Developer with demonstrated working history for more than 1-year in IT and Service Industry.

Working on Algorithm Design , Scan Chain Diagnosis using ML, Fail Analysis in Semiconductors,  Defect detection and reduction, Multi-objective optimization, Reinforcement Learning, Deep Learning, Evolutionary Algorithms.

Strong technical skills, including Digital IC design, APR tools, pre-simulation and post-simulation analysis, RAM Testing , Fault repair using BISR, DFT Process flow, Redundant Analysis and CMOS technology . 

Also familiar with Semiconductor fabrication flow, electronics fundamentals, DSP, IC test algorithms and test bench development, Interconnects, 

NTHU EE, Hsinchu, TW
[email protected]


Work Experience

Multi Objective Control Lab MOC, NTHU ,Research Assistant, May 2019 ~ Present

  • Working on AI algorithm design and Implementation to solve multi-objective problems.
  • Involve with performing  simulation for modular robots in robust environment to learn faster by energy-efficient way.
  • Exploring multiple control AI techniques such as Reinforcement learning (Q-learning, SARSA, policy gradient) , Deep RL (Deep Q, Actor-Critic, DDPG, PPO) and Evolutionary Algorithms (Genetic Algorithm, NEAT).

IC design and Exploration Lab IC-Dex, NTHU ,Research Assistant, March 2018~ Apr 2019

  • Co-worked with lab members on industry sponsored project  to develop a tool that can perform Scan Chain Diagnosis of  IC using Multi stage ANN for different fault types such as Stuck-at fault, stuck-open fault.
  • Performed simulation of optimizing IC test process by different Deep Learning models such as CGNN, CNN, RNN, LSTM using tensorflow, keras and TFLearn library and python.
  • Coordinated with Scientist and Engineers of Mentor Graphics, USA team to develop and train efficient Machine learning models and pre-model data preparation.
  • Worked on IC design, synthesis and Layout  tools like Cadence Virtuoso, Laker, Composer, Design Compiler and  Verilog, Hspice, C++ programming. 

Mentor Graphics Hsinchu,TW, Summer Research Intern, March 2017 ~ March 2018

  • Worked closely with DFT team to understand the Build in self-test (BIST) flow, Commercial tool tessent Faul finding techniques for Intermittent and Permanent faults in IC.
  • Cooperated with US-based DFT team for enhancing commercial test tool to incorporate ML for advance IC testing and diagnosis.
  • Supported in Data preparation and Data refinement for designed Neural Network models to be tested by considering different Benchmark and Industry based circuit.

TATA Consultancy Services, Bangalore, India, Assistance System Engineer,  May 2019 ~ Present

  • Worked as ABAP Software developer to design enterprise software for managing business operations and customer relations.
  • Actively participated in core development  for different client by using SAP platforms such as Webdynpro, SAP HANA database.
  • Learn about team coordination and professional client meeting to demonstrate projects and process flow. 

Projects

Preference Based Weighted Sum Multi-Objective Energy Efficient Gait Optimization for Snake-like Modular Robot, MOC Lab, June 2018 - Current

  • Simulation on Modular robot reconfiguration and Control  for adopting snake like shape. 
  • Multi-objective optimization of gait parameters using weighted sum approach for energy efficient locomotion.
  • Using python, C++ programming, Tensor flow framework and VREP physics engine to perform simulation

Diagnosis of Intermittent Scan Chain Faults Through a Multi-Stage Neural Network Reasoning Process, IC-DeX Lab, June 2018 - Apr 2019

  • Co-worked with Lab mates to design tool for IC testing using Deep Learning.
  • Worked on NN model fine tuning and parameter setup to get higher test and validation accuracy.
  • Analyse different net-list to extract the test information for data preparation.
  • Extracted Integer failure log and Combined failure logs from log file generated from commercial scan chain test tool.

Implementation of A Multi-Modulus Frequency Divider, Course Project, VLSI Design NTHU ,Oct 2019 - Dec - 2019

  • Implemented multi-modulus frequency divider with total 4 modes operation (÷16 / 18/ 20 / 22). 
  • Circuit synthesis done by Composer tool as well Hspice and Layout design on Laker tool. 
  • Pre-simulation and Post -simulation done to get minimum area and power consumption by selecting TSPC DFF.
  • Achieved maximum operating frequency 8 GHz pre-sim and 5 GHz post sim.

RL based Control algorithm design for classical Control System, Course Project, System Theory-RL, NTHU,Oct 2019 - Dec - 2019

  • Solving gym environment classic control problem by implementing multiple reinforcement learning methods such as Q-Learning, Deep Q learning, Actor-Critic, Deep Deterministic Policy Gradient(DDPG), Proximal policy Optimisation(PPO).

Implementation of BIST circuit for MOVI Alogorithm for SRAM Testing, Course Project, Semiconductor Memory testing,  NTHU Feb 2018 - May 2019

  • MOVI Algorithm is known for Memory-Testing. Its March-based test elements are all simple and possess good fault coverage (AF,SAF,TF and CF). 
  • Designed a BIST circuit and its controller for SRAM Testing using MOVI Algorithm.

Other Projects

  • Visual Question answering - VQA : final project of Computer vision course 
  • Music Composition using LSTM Network : final project of Computer vision course

Honors & Awards 

2013 Finalist, International student Project Contest Srajan15 held by MANIT and IEEE Bhopal India 

2013 Finalist, National level Exhibition I-FAST SAVISHKAR15 organized by MANIT,M.P and C.G. Council of Science and Technology Bhopal India 

2014 Finalist, Free Scale Cup competition (TFC-2015) organised by Freescale and Mathswork and held at IIS-Banglore  India 

2013, 14 Selected 2 times , E-yantra competition held by IIT- bombay and MHRD Delhi India

Education

National Tsing Hua University, MASTERS IN ELECTRICAL ENGINEERING DEPARTMENT, 2018 ~ 2020

Shri Mata Vaishno Devi University, BACHELOR OF TECHNOLOGY, 2012 ~ 2016

履歷
個人檔案
Nvla6g7al6pouednqvl9

Akash Singh 阿卡什

Enthusiastic Master Student and experienced Software Developer with demonstrated working history for more than 1-year in IT and Service Industry.

Working on Algorithm Design , Scan Chain Diagnosis using ML, Fail Analysis in Semiconductors,  Defect detection and reduction, Multi-objective optimization, Reinforcement Learning, Deep Learning, Evolutionary Algorithms.

Strong technical skills, including Digital IC design, APR tools, pre-simulation and post-simulation analysis, RAM Testing , Fault repair using BISR, DFT Process flow, Redundant Analysis and CMOS technology . 

Also familiar with Semiconductor fabrication flow, electronics fundamentals, DSP, IC test algorithms and test bench development, Interconnects, 

NTHU EE, Hsinchu, TW
[email protected]


Work Experience

Multi Objective Control Lab MOC, NTHU ,Research Assistant, May 2019 ~ Present

  • Working on AI algorithm design and Implementation to solve multi-objective problems.
  • Involve with performing  simulation for modular robots in robust environment to learn faster by energy-efficient way.
  • Exploring multiple control AI techniques such as Reinforcement learning (Q-learning, SARSA, policy gradient) , Deep RL (Deep Q, Actor-Critic, DDPG, PPO) and Evolutionary Algorithms (Genetic Algorithm, NEAT).

IC design and Exploration Lab IC-Dex, NTHU ,Research Assistant, March 2018~ Apr 2019

  • Co-worked with lab members on industry sponsored project  to develop a tool that can perform Scan Chain Diagnosis of  IC using Multi stage ANN for different fault types such as Stuck-at fault, stuck-open fault.
  • Performed simulation of optimizing IC test process by different Deep Learning models such as CGNN, CNN, RNN, LSTM using tensorflow, keras and TFLearn library and python.
  • Coordinated with Scientist and Engineers of Mentor Graphics, USA team to develop and train efficient Machine learning models and pre-model data preparation.
  • Worked on IC design, synthesis and Layout  tools like Cadence Virtuoso, Laker, Composer, Design Compiler and  Verilog, Hspice, C++ programming. 

Mentor Graphics Hsinchu,TW, Summer Research Intern, March 2017 ~ March 2018

  • Worked closely with DFT team to understand the Build in self-test (BIST) flow, Commercial tool tessent Faul finding techniques for Intermittent and Permanent faults in IC.
  • Cooperated with US-based DFT team for enhancing commercial test tool to incorporate ML for advance IC testing and diagnosis.
  • Supported in Data preparation and Data refinement for designed Neural Network models to be tested by considering different Benchmark and Industry based circuit.

TATA Consultancy Services, Bangalore, India, Assistance System Engineer,  May 2019 ~ Present

  • Worked as ABAP Software developer to design enterprise software for managing business operations and customer relations.
  • Actively participated in core development  for different client by using SAP platforms such as Webdynpro, SAP HANA database.
  • Learn about team coordination and professional client meeting to demonstrate projects and process flow. 

Projects

Preference Based Weighted Sum Multi-Objective Energy Efficient Gait Optimization for Snake-like Modular Robot, MOC Lab, June 2018 - Current

  • Simulation on Modular robot reconfiguration and Control  for adopting snake like shape. 
  • Multi-objective optimization of gait parameters using weighted sum approach for energy efficient locomotion.
  • Using python, C++ programming, Tensor flow framework and VREP physics engine to perform simulation

Diagnosis of Intermittent Scan Chain Faults Through a Multi-Stage Neural Network Reasoning Process, IC-DeX Lab, June 2018 - Apr 2019

  • Co-worked with Lab mates to design tool for IC testing using Deep Learning.
  • Worked on NN model fine tuning and parameter setup to get higher test and validation accuracy.
  • Analyse different net-list to extract the test information for data preparation.
  • Extracted Integer failure log and Combined failure logs from log file generated from commercial scan chain test tool.

Implementation of A Multi-Modulus Frequency Divider, Course Project, VLSI Design NTHU ,Oct 2019 - Dec - 2019

  • Implemented multi-modulus frequency divider with total 4 modes operation (÷16 / 18/ 20 / 22). 
  • Circuit synthesis done by Composer tool as well Hspice and Layout design on Laker tool. 
  • Pre-simulation and Post -simulation done to get minimum area and power consumption by selecting TSPC DFF.
  • Achieved maximum operating frequency 8 GHz pre-sim and 5 GHz post sim.

RL based Control algorithm design for classical Control System, Course Project, System Theory-RL, NTHU,Oct 2019 - Dec - 2019

  • Solving gym environment classic control problem by implementing multiple reinforcement learning methods such as Q-Learning, Deep Q learning, Actor-Critic, Deep Deterministic Policy Gradient(DDPG), Proximal policy Optimisation(PPO).

Implementation of BIST circuit for MOVI Alogorithm for SRAM Testing, Course Project, Semiconductor Memory testing,  NTHU Feb 2018 - May 2019

  • MOVI Algorithm is known for Memory-Testing. Its March-based test elements are all simple and possess good fault coverage (AF,SAF,TF and CF). 
  • Designed a BIST circuit and its controller for SRAM Testing using MOVI Algorithm.

Other Projects

  • Visual Question answering - VQA : final project of Computer vision course 
  • Music Composition using LSTM Network : final project of Computer vision course

Honors & Awards 

2013 Finalist, International student Project Contest Srajan15 held by MANIT and IEEE Bhopal India 

2013 Finalist, National level Exhibition I-FAST SAVISHKAR15 organized by MANIT,M.P and C.G. Council of Science and Technology Bhopal India 

2014 Finalist, Free Scale Cup competition (TFC-2015) organised by Freescale and Mathswork and held at IIS-Banglore  India 

2013, 14 Selected 2 times , E-yantra competition held by IIT- bombay and MHRD Delhi India

Education

National Tsing Hua University, MASTERS IN ELECTRICAL ENGINEERING DEPARTMENT, 2018 ~ 2020

Shri Mata Vaishno Devi University, BACHELOR OF TECHNOLOGY, 2012 ~ 2016