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4-6 năm
6-10 năm
10-15 năm
Hơn 15 năm
Taipei City, Taiwan
Past
Industrial Engineer @鴻海精密工業股份有限公司2019 ~ 2023
・
Data Analyst 數據分析師 / Data Scientist 資料科學家
Trong vòng một tháng
據 ·思緒縝密、規劃能力強，領導團隊朝目標推進 ·積極主動、學習能力佳，持續吸收新知識 [email protected] 技能 Skills • Python • R • Power BI • MySQL • SAP • SAS • Pandas • Numpy • Matplotlib • Scikit-learn • Seaborn • TOEIC 705 工作經歷 Work Experience 鴻海 Foxconn Industrial Internet, IE工程師/AI專案分析師 , Feb 2019 ~ Jun工業4.0、 數位轉型專案推導 (70%)： 協助工
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Sẵn sàng phỏng vấn
Full-time / Quan tâm đến làm việc từ xa
4-6 năm
國立臺北大學 National Taipei University
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經濟學
Product Manager @東元電機股份有限公司 (TECO Electric & Machinery Co. Ltd.)2023 ~ 2023
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Data Scientist, Data Analyst, Machine Learning Engineer
Trong vòng một tháng
梁賦康 （Foo-Hong, Leong） Taoyuan City, Taiwan Email: [email protected] Tel:Skills • Languages: Python • DataBases: MySQL, SQLite • Infrastructure tools: Github • Machine learning libraries: TensorFlow, Keras, and Scikit-learn • Data visualization tools: Power BI, Seaborn and Matplotlib • Deployment: Streamlit Summary I have been working in Motor Manufacturing Industry for 8 years. My first programming was going to my Bachelor's degree, C++ was the first program I learned. Then I started to learn Python in 2018 at TEDU and my first project was the Stock Trend Prediction by CNN. I kept
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Full-time / Quan tâm đến làm việc từ xa
6-10 năm
國立成功大學 National Cheng Kung University
・
Mechanical EngineeringKế hoạch tuyển dụng đơn giản và hiệu quả nhất
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Software Engineer
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Full-time
Địa điểm
台灣台北, 台灣新竹
Làm việc từ xa
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Freelance
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Học vấn
Trường học
國立清華大學
Chuyên ngành
Computer Science
謝宗佐 (Tsung-Tso Hsieh)
[email protected] https://github.com/heyfey https://www.linkedin.com/in/tthsieh
(+886)975-923-670
Experience
Synopsys Inc.
Jan. 2022 - Present
Senior Software Engineer
VCS - Verilog Compile Simulator
C++, C, Compiler Optimization, Parallel Computing, Python
- Developed and supported debug functionality for SystemVerilog compile simulator
- Parallelized design traversal in FSDB waveform dumping, speeding up runtime by 3x with multithreading
- Optimized FSDB gate-data loading and reduced 10-60% runtime memory footprint, benefiting customers running hundreds-of-GB designs with tight memory budgets
- Initiated a project to migrate STL hash tables to Abseil Swiss tables for a millions-line code base, reducing up to 70% peak memory usage and speeding up hash table queries by 100%
- Debugged and resolved urgent customer issues in tight timelines (< 1 day TAT) with limited information, tools, and access to the environment
MediaTek Inc.
July 2020 - Aug. 2020
Software Engineer Intern
C, Python, Machine Learning
- Designed memory management algorithm & firmware for real-time embedded system
- Introduced machine learning and data visualization to automate issue analysis, saving 90% of human effort
Projects
GPU scheduler for elastic/distributed deep learning workloads in Kubernetes cluster
Golang, Python, Distributed Systems
- Architected and built a GPU scheduler using microservices architecture on top of Kubernetes and various open-source projects
- Sped up overall training time by 2.38x and increased cluster utilization by 1.4x with
- State-of-the-art scheduling algorithms with resource elasticity
- Topology-aware scheduling & worker migration to consolidate resources
- Designed and implemented heterogeneous scheduling, auto-scaling, and fault-tolerant mechanisms for the system
Publication
Tsung-Tso Hsieh, Che-Rung Lee: "Voda: A GPU Scheduling Platform for Elastic Deep Learning in Kubernetes Clusters", in IEEE International Conference on Cloud Engineering (IC2E), 2023
Education
National Tsing Hua University
Computer Science, M.S.
SCOPE Lab (Scientific Computing On Parallel Environment)
2019 - 2021
National Tsing Hua University
Double Major in Law and Computer Science, B.S.
2014 - 2018
謝宗佐 (Tsung-Tso Hsieh)
[email protected] https://github.com/heyfey https://www.linkedin.com/in/tthsieh
(+886)975-923-670
Experience
Synopsys Inc.
Jan. 2022 - Present
Senior Software Engineer
VCS - Verilog Compile Simulator
C++, C, Compiler Optimization, Parallel Computing, Python
- Developed and supported debug functionality for SystemVerilog compile simulator
- Parallelized design traversal in FSDB waveform dumping, speeding up runtime by 3x with multithreading
- Optimized FSDB gate-data loading and reduced 10-60% runtime memory footprint, benefiting customers running hundreds-of-GB designs with tight memory budgets
- Initiated a project to migrate STL hash tables to Abseil Swiss tables for a millions-line code base, reducing up to 70% peak memory usage and speeding up hash table queries by 100%
- Debugged and resolved urgent customer issues in tight timelines (< 1 day TAT) with limited information, tools, and access to the environment
MediaTek Inc.
July 2020 - Aug. 2020
Software Engineer Intern
C, Python, Machine Learning
- Designed memory management algorithm & firmware for real-time embedded system
- Introduced machine learning and data visualization to automate issue analysis, saving 90% of human effort
Projects
GPU scheduler for elastic/distributed deep learning workloads in Kubernetes cluster
Golang, Python, Distributed Systems
- Architected and built a GPU scheduler using microservices architecture on top of Kubernetes and various open-source projects
- Sped up overall training time by 2.38x and increased cluster utilization by 1.4x with
- State-of-the-art scheduling algorithms with resource elasticity
- Topology-aware scheduling & worker migration to consolidate resources
- Designed and implemented heterogeneous scheduling, auto-scaling, and fault-tolerant mechanisms for the system
Publication
Tsung-Tso Hsieh, Che-Rung Lee: "Voda: A GPU Scheduling Platform for Elastic Deep Learning in Kubernetes Clusters", in IEEE International Conference on Cloud Engineering (IC2E), 2023
Education
National Tsing Hua University
Computer Science, M.S.
SCOPE Lab (Scientific Computing On Parallel Environment)
2019 - 2021
National Tsing Hua University
Double Major in Law and Computer Science, B.S.
2014 - 2018