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Technical Consultant - IoT & Edge Computing @IBM Taiwan
2021 ~ Present
Front-End Developer
Within one month
React Hooks
Javascript(ES6)
Lodash
Employed
Ready to interview
Full-time / Interested in working remotely
6-10 years
中原大學 Chung Yuan Christian University
資訊工程
Avatar of Vivian.
Avatar of Vivian.
Past
Product Specialist @老達利貿易股份有限公司(Canon Medical)
2016 ~ 2019
Within two months
period) • Gallant Precision Machining Co., Ltd. (GPM 均豪精密) SeptemberFebruary 2021 •Optimize Programming for AOI to meet customer need. •Deploy artificial-intelligence machine learning models on AOI tools to reduce over-rejection. •Monitor and analyze data output and make data driven decisions to keep process in control, assess equipment performance leading to over-rejection. Product Specialist and Sales Representative • 老達利貿易股份有限公司(Canon Medical) AugustMarch 2019 Product Specialist(09//2019) •Created informational and engaging presentations of product lines to demonstrate features for new
Statistical Process Control (SPC)
JMP
FDC
Unemployed
Open to opportunities
Full-time / Not interested in working remotely
4-6 years
National Tsing Hua University
Mechanical Engineering
Avatar of Thomas Disselkamp.
Consulting: optical systems, electrical and magnetic materials
More than one year
Thomas Disselkamp Active Citizen with Many Pursuits, Community Ties A product development specialist in the 3M Company's Infection Prevention Division, Thomas Disselkamp has taken the lead on many important corporate projects. Across a nearly 30-year career, Tom Disselkamp has earned expertise in several areas, such as infrared and ultraviolet optics, signal processing, medical diagnostic equipment, and polarimetry. However, outside of work, Thomas Allen Disselkamp pursues many activities and hobbies and devotes himself to several charities. Outdoors and around the home, Disselkamp enjoys vegetable gardening, repair projects, and landscaping. Cutting and carrying firewood is a
Word
Excel
PowerPoint
Open to opportunities
Part-time
More than 15 years
University of Minnesota, Minneapolis MN
Bachelor of Science in Electrical Engineering, emphasis on materials science
Avatar of 林庭揚.
Offline
Avatar of 林庭揚.
Offline
Process Integration Engineer @Taiwan Semiconductor Manufacturing Company
2014 ~ Present
Product Engineer
Within one year
products). Successfully improve product yield through data analysis and DOE, and enhance process tolerance. "Teamwork" is very important to me both in the graduate school and in the company. I hope that I have opportunity to try my best for your company with my extensive experience. Process Integration Engineer, TSMC, Tainan, Taiwan [email protected] Semiconductor (5nm~90nm) Device engineering Semiconductor Process WAT Analysis Yield Analysis Process Quality Test Manufacturing Statistical Process Control (SPC) Cp/Cpk Failure Mode and Effects Analysis (FMEA) Design of Experiments (DOE) PDCA 3-Leg-5-Why 8D Pareto
Full-time / Interested in working remotely
4-6 years
Cheng Kung University
Electrical Engineering
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Avatar of Steve West.
Director of Quality @LNR
Regional Manager/Director of Quality, Damage Prevention and Safety
More than one year
an estimated 1.5 million which improved quality. Investigated bay area flood table issues helping to avoid catastrophic vehicle losses Managed a facility to include 3 staff and 18 drivers injury free for more than 1000 days. Risk Management : Drug, Alcohol, & Harassment in the workplace Safety Coordinator SPC ( Statistical, Process, Control) Q1 ( Ford) GRASP USDOT Motor Carrier Safety Compliance Eastern Michigan University : SPC for Service & Administrative Processes J.J. Keller : Safety Coordinator Certification Course Experience Director of Quality and Safety LNR Auto Transport 02//2018 Successfully saved over $280,000 in damage claims
Microsoft Office
Microsoft Excel
PowerPoint
Full-time / Interested in working remotely
More than 15 years
Solano Community College
AA in General Studies with some Management course work
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Past
Seller @Sell MAP Ltd (Shopee)
2022 ~ 2024
主任工程師
Within one month
SPC
FDC
FMEA
Unemployed
Ready to interview
Full-time / Interested in working remotely
6-10 years
大葉大學 DaYeh University
電機工程學系
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Supplier Development Engineer @Olympus Global
2018 ~ 2022
Within one month
IATF16949 knowledge
APQP/FMEA/MSA/SPC/PPAP
CQI-8/CQI-9/CQI-11/CQI-12..etc
Full-time / Interested in working remotely
10-15 years
MingChuang University
Applied English
Avatar of 林孟錡.
Avatar of 林孟錡.
Artificial Intelligence Engineer @PFG Fiber Glass Corp
2019 ~ Present
資料分析師、資料科學家
Within one month
林孟錡 Statistical Analysis Business Intelligence Chemistry and analytical laboratory techniques PhoneE-mail [email protected] 工作經歷 Artificial Intelligence Engineer • PFG Fiber Glass Corp 2019/01-Now Chiayi City, Taiwan Planning and promotion AI projects, reducing product abnormality rate from 50%↘10%. Analyze process data and make suggestions for improvement. Promotion digital transformation. Laboratory Manager • PFG Fiber Glass Corp 2016/10 – Now Chiayi City, Taiwan, Handle quality control, payroll, and staff evaluations. Developed new raw material monitoring method. Designed processes to increase efficiency by minimizing error and
Business Intelligence
Statistical Analysis
Tableau
Employed
Full-time / Interested in working remotely
4-6 years
Chang Gung University
Master's degree , Chemical Engineering Technology/Technician

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Within one year
Process Integration Engineer @ Taiwan Semiconductor Manufacturing Company
Taiwan Semiconductor Manufacturing Company
2014 ~ Present
Professional Background
Current status
Job Search Progress
Professions
Other
Fields of Employment
Manufacturing
Work experience
4-6 years
Management
Skills
Languages
Chinese
Native or Bilingual
English
Fluent
Japanese
Beginner
Job search preferences
Positions
Product Engineer
Job types
Full-time
Locations
Hsinchu County, 台灣
Remote
Interested in working remotely
Freelance
Educations
School
Cheng Kung University
Major
Electrical Engineering
Print

林庭揚 (Ting Yang, Lin)

Over 7 years of semiconductor integration experience, and successful Tape-Out new products to 5nm from 90nm and mass production (including logic and more than moore products). Successfully improve product yield through data analysis and DOE, and enhance process tolerance. "Teamwork" is very important to me both in the graduate school and in the company. I hope that I have opportunity to try my best for your company with my extensive experience. 

Process Integration Engineer, TSMC,

Tainan, Taiwan
[email protected]

+886 963958505

Profile 04 00@2x

Skills


Semiconductor (5nm~90nm)

  • Device engineering
  • Semiconductor Process
  • WAT Analysis
  • Yield Analysis
  • Process Quality Test



Manufacturing

  • Statistical Process Control (SPC)
  • Cp/Cpk
  • Failure Mode and Effects Analysis (FMEA)
  • Design of Experiments (DOE)
  • PDCA
  • 3-Leg-5-Why
  • 8D
  • Pareto Chart
  • Box Plot & Normal Quantile Plot


Failure Analysis Tool

  • JMP software
  • Transmission Electron Microscopy (TEM)
  • Energy-dispersive X-ray spectroscopy (EDX)

Work Experience

TSMC, Process Integration Engineer Nov 2014 ~ Present

  • 5nm process experience for new product tape-out, yield/device improvement, process optimization and risk assessment.
  • More than moore products' experience including 40/55/80nm high voltage (panel driver), 90nm eDRAM and 65nm automotive products.
  • Yield/ device troubleshooting in semiconductor process and coordinating cross team (Module/ Device/ Defect/ Product) to propose possible solution. 
  • Design, execute and analyze experiment to find out process sweet spot for process window assurance. 
  • Good for customer management: technical support, successful new tape-out pilot run, device window optimization and continue improvement plan. 
  • Mass data analysis: inline/WAT/CP/FT data integrated analysis by EDA tool -- Implement FA skill for chip failure mechanism analysis, such as FIB/SEM/TEM/EDX,etc.

Award & Honor (TSMC)

  • 2019 1H Engineering Contribution Award (Quality Improvement), 2nd Award, 2019
  • Success tape-out customer 1st 40nm HV product, yield is over 90%, and pass customer product quality test.
  • (5nm) Found wafer edge low yield caused by rework effect
  • (5nm) Found chronic wafer center low yield caused by device profile and tool issue
  • (40nm) Found and reduce the device leakage.
  • (55nm) Improve wafer edge yield loss due to leakage and process weakness by wafer uniformity increment.

Paragraph image 00 00@2x

Education

National Cheng Kung University (NCKU)

Master's Degree, Electrical and Electronics Engineering, 2012 ~ 2014

Design and Verification of the Control Procedure of Attitude Determination and Control Subsystem for Nanosatellite.

  • Participate 1st cubesat (PACE) make and launch
  •  Japan Satellite Design Contest: lead graduate and college students to do engineering design
  • Phoenix (QB50 project): Be responsible for attitude determination and control system
  • Matlab  teaching assistant 

National Cheng Kung University (NCKU) 

Bachelor's's Degree, Systems and Naval Mechatronic Engineering, 2008 ~ 2012

Award & Honor (NCKU)

  • The 20th Japan Satellite Design Contest, 1st Award, 2012
  • Participate to manufacture 1st nanosatellite by students.  

Paragraph image 04 00@2x
Paragraph image 04 01@2x
Resume
Profile

林庭揚 (Ting Yang, Lin)

Over 7 years of semiconductor integration experience, and successful Tape-Out new products to 5nm from 90nm and mass production (including logic and more than moore products). Successfully improve product yield through data analysis and DOE, and enhance process tolerance. "Teamwork" is very important to me both in the graduate school and in the company. I hope that I have opportunity to try my best for your company with my extensive experience. 

Process Integration Engineer, TSMC,

Tainan, Taiwan
[email protected]

+886 963958505

Profile 04 00@2x

Skills


Semiconductor (5nm~90nm)

  • Device engineering
  • Semiconductor Process
  • WAT Analysis
  • Yield Analysis
  • Process Quality Test



Manufacturing

  • Statistical Process Control (SPC)
  • Cp/Cpk
  • Failure Mode and Effects Analysis (FMEA)
  • Design of Experiments (DOE)
  • PDCA
  • 3-Leg-5-Why
  • 8D
  • Pareto Chart
  • Box Plot & Normal Quantile Plot


Failure Analysis Tool

  • JMP software
  • Transmission Electron Microscopy (TEM)
  • Energy-dispersive X-ray spectroscopy (EDX)

Work Experience

TSMC, Process Integration Engineer Nov 2014 ~ Present

  • 5nm process experience for new product tape-out, yield/device improvement, process optimization and risk assessment.
  • More than moore products' experience including 40/55/80nm high voltage (panel driver), 90nm eDRAM and 65nm automotive products.
  • Yield/ device troubleshooting in semiconductor process and coordinating cross team (Module/ Device/ Defect/ Product) to propose possible solution. 
  • Design, execute and analyze experiment to find out process sweet spot for process window assurance. 
  • Good for customer management: technical support, successful new tape-out pilot run, device window optimization and continue improvement plan. 
  • Mass data analysis: inline/WAT/CP/FT data integrated analysis by EDA tool -- Implement FA skill for chip failure mechanism analysis, such as FIB/SEM/TEM/EDX,etc.

Award & Honor (TSMC)

  • 2019 1H Engineering Contribution Award (Quality Improvement), 2nd Award, 2019
  • Success tape-out customer 1st 40nm HV product, yield is over 90%, and pass customer product quality test.
  • (5nm) Found wafer edge low yield caused by rework effect
  • (5nm) Found chronic wafer center low yield caused by device profile and tool issue
  • (40nm) Found and reduce the device leakage.
  • (55nm) Improve wafer edge yield loss due to leakage and process weakness by wafer uniformity increment.

Paragraph image 00 00@2x

Education

National Cheng Kung University (NCKU)

Master's Degree, Electrical and Electronics Engineering, 2012 ~ 2014

Design and Verification of the Control Procedure of Attitude Determination and Control Subsystem for Nanosatellite.

  • Participate 1st cubesat (PACE) make and launch
  •  Japan Satellite Design Contest: lead graduate and college students to do engineering design
  • Phoenix (QB50 project): Be responsible for attitude determination and control system
  • Matlab  teaching assistant 

National Cheng Kung University (NCKU) 

Bachelor's's Degree, Systems and Naval Mechatronic Engineering, 2008 ~ 2012

Award & Honor (NCKU)

  • The 20th Japan Satellite Design Contest, 1st Award, 2012
  • Participate to manufacture 1st nanosatellite by students.  

Paragraph image 04 00@2x
Paragraph image 04 01@2x