1.Use Python control BMC for board test.(Use Language:Shell Scripts, C, Python。Use software : Python, Linux, VISA).
2.Experienced in digital circuitry design and review, such as DC-DC Converter, Fan Board control, PCIE, I2C, UART, SPI, JTAG, USB…etc.
3.Familiar with the PCB design tool (Cadence Allegro/ORCAD) to generate schematic and essential information.
4.Basic knowledge of CPU internal structure and Maintain FPGA/CPLD code(Use Language Verilog), and digital logic circuitry (flip-flop, latch, counter, shift register...etc.).
5.Collaborating with the cross function team (SI, Layout, FPGA, Software…etc.) and vendor to clarify the issue of product, come out with the solution and make it satisfying the requirement from customer.
6.Run Linux tool to see CPU high speed.
Use Language :
1.Verilog
Use tool: CPLD/FPGA
Use Language :
1. Python
2. Shell Scripts
Use tool: Python, Linux, VISA
Communicate DSP/LabVIEW/MATLAB
Use Language :
1.LabVIEW
2.C
3.MATLAB
Use instrument :
1. PRODIGIT 33622 F
2. GW INSTEK SPD-3606
3. NI9929, NI9481
4. Tektronix
Design Circuit :
1. DC - DC Converter
Use tool: AllegroConcept/OrCAD
DC - DC bidirectional buck boost converter:
Charging battery :boost converter
Discharging battery :buck converter
Use Language :
1.Visual Basic
2.MATLAB
3.C
Use Language :
1.Visual Basic
2.MATLAB
3.C
Use Language :
1.Visual Basic
2.MATLAB
3.C
Use Language :
1.MATLAB
Use Language :
1.Python
1. LabVIEW
2. C
3. Verilog
4. MATLAB
5.Visual Basic
6.Python
1.CPLD
2.FPGA
3.Allegro Concept
4.OrCAD
5.Linux
1.Use Python control BMC for board test.(Use Language:Shell Scripts, C, Python。Use software : Python, Linux, VISA).
2.Experienced in digital circuitry design and review, such as DC-DC Converter, Fan Board control, PCIE, I2C, UART, SPI, JTAG, USB…etc.
3.Familiar with the PCB design tool (Cadence Allegro/ORCAD) to generate schematic and essential information.
4.Basic knowledge of CPU internal structure and Maintain FPGA/CPLD code(Use Language Verilog), and digital logic circuitry (flip-flop, latch, counter, shift register...etc.).
5.Collaborating with the cross function team (SI, Layout, FPGA, Software…etc.) and vendor to clarify the issue of product, come out with the solution and make it satisfying the requirement from customer.
6.Run Linux tool to see CPU high speed.
Use Language :
1.Verilog
Use tool: CPLD/FPGA
Use Language :
1. Python
2. Shell Scripts
Use tool: Python, Linux, VISA
Communicate DSP/LabVIEW/MATLAB
Use Language :
1.LabVIEW
2.C
3.MATLAB
Use instrument :
1. PRODIGIT 33622 F
2. GW INSTEK SPD-3606
3. NI9929, NI9481
4. Tektronix
Design Circuit :
1. DC - DC Converter
Use tool: AllegroConcept/OrCAD
DC - DC bidirectional buck boost converter:
Charging battery :boost converter
Discharging battery :buck converter
Use Language :
1.Visual Basic
2.MATLAB
3.C
Use Language :
1.Visual Basic
2.MATLAB
3.C
Use Language :
1.Visual Basic
2.MATLAB
3.C
Use Language :
1.MATLAB
Use Language :
1.Python
1. LabVIEW
2. C
3. Verilog
4. MATLAB
5.Visual Basic
6.Python
1.CPLD
2.FPGA
3.Allegro Concept
4.OrCAD
5.Linux