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进阶搜寻
On
4 到 6 年
6 到 10 年
10 到 15 年
15 年以上
曾任
R&D process integration engineer @ UMC2014 ~ 2022
・
Semiconductor Engineer
超過一年
謝宗殷 (Azure) R&D technical manager Tainan City, Taiwan Graduated with a master's degree in the Electrical Engineering Department from National Yang Ming Chiao Tung University. As a R&D technical manager at UMC about 7.7 years of experience, and process integration engineer at TSMC about 3.8 years of experience. Mainly responsible for: semiconductor process development, product yield improvement and device reliability improvement. Email : [email protected] Phone:Work experience R&D technical manager • UMC JuneMarchnm FiNFET BEoL process development, product yield improvement and
待业中
・
目前没有兴趣寻找新的机会
全职 / 对远端工作有兴趣
10 到 15 年
National Yang Ming Chiao Tung University
・
Electrical Engineering & IC design
曾任
製程工程師 @台灣積體電路公司2018 ~ 2020
・
研發工程師
半年內
setup 3. cost reduction 80w/month 4. slot effect improve 50% 5. defect improvement from 5 to 3 count/ wafer 台灣積體電路公司, 製程工程師process engineer, Jun 2018 ~ SepF18 N5 FEOL new tech transition 2. FINFET CD / depth SPC maintain 3. WPH improvement 50% 4.new tool import for production line expansion 5. DOE design uniformity improve 30% 6. Auto system coordinator and APC setup Equipment Process: TEL SCCM/VIGUS/F1000 Hitachi 9012 Measurement: (CDSEM/ SCD/
待业中
全职 / 对远端工作有兴趣
4 到 6 年
成功大學
・
微電漿系統最轻量、快速的招募方案，数百家企业的选择
搜寻简历，主动联系求职者，提升招募效率。
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- 搜尋僅開放付費企業檢視的简历
- 检视使用者信箱 & 电话
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1
Search a precise keyword combination
senior backend php
2
Use quotes to search for an exact phrase
"business development"
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Use the minus sign to eliminate results containing certain words
UI designer -UX
职场能力评价定义
专业技能
该领域中具备哪些专业能力（例如熟悉 SEO 操作，且会使用相关工具）。
问题解决能力
能洞察、分析问题，并拟定方案有效解决问题。
变通能力
遇到突发事件能冷静应对，并随时调整专案、客户、技术的相对优先序。
沟通能力
有效传达个人想法，且愿意倾听他人意见并给予反馈。
时间管理能力
了解工作项目的优先顺序，有效运用时间，准时完成工作内容。
团队合作能力
具有向心力与团队责任感，愿意倾听他人意见并主动沟通协调。
领导力
专注于团队发展，有效引领团队采取行动，达成共同目标。
专业背景
目前状态
求职阶段
专业
半导体工程师
产业
制造
工作年资
6 到 10 年工作经验（2 到 4 年相关工作经验）
管理经历
无
技能
语言能力
English
・
中阶
求职偏好
希望获得的职位
预期工作模式
全职
期望的工作地点
远端工作意愿
对远端工作有兴趣
接案服务
是，我目前是全职接案者
学历
学校
國立成功大學
主修科系
材料科學及工程學系
In charge of R&D integration 7 years
Communicate, coordinate and cooperate across companies and departments, good communication skills and stress tolerance with others, and cultivate curiosity to get in touch with new knowledge.
Proactive, focused, efficient, attentive, humble and well understanding are my personality traits.
Employment
RD Process Integration • United Microelectronics Corporation
April, 2015 - Feb, 2022
- Conduct keys lots WAT yield analysis through logical reasoning and verify by SEM/TEM with FA team to find process issue in 14nm Finfet technology development from pre-production to mass-production
- Establish device characteristic procedure and train new colleagues quick hands-on
- Manage lot handle to ensure manufacturing quality in 14nm Finfet and 22nm platform technology
- Design Testkey with tools klayout, laker, UDD(user define device), boolean editor and qualify by DRC,PLC, LVS, XOR deck for process monitor in 14nm/22nm/28nm/40nm/MRAM tapeout
- Establish process flow in Power GaN HEMT by investigating worldwide e.g. iMEC and studying academic research e.g. NYCU, CGU for technical pathfinding
- Construct inline AFM methodology to monitor pGaN step-height for Vth, Ron improvement and inline TLM analysis to distinguish Ron into Rc, resistance of access region, resistance of gate for process stability control
- Lead pGaN, passivation loop and cowork with Wavetech, Unikorn,Episil and modules in Power GaN HEMT development to meet device target
- Self-study in academic program e.g. Semiconductor Physics and Devices, Electronics, Electromagnetics, Microwave Engineerings, Radio Frequency Amplifier Design
Education
National Cheng Kung University
Major in Material Science and Engineering
National Chung Hsing University
Major in Material Science and Engineering
Master degree
2012-2014
Bachelor degree
2008-2012
Standard Skills
- PowerPoint
- Excel
Special Skills
- Laker
- Klayout
- DRC
- LVS
Languages
- Chinese — Proficient
- English — Speaking/ Writing/ Reading: Intermediate
In charge of R&D integration 7 years
Communicate, coordinate and cooperate across companies and departments, good communication skills and stress tolerance with others, and cultivate curiosity to get in touch with new knowledge.
Proactive, focused, efficient, attentive, humble and well understanding are my personality traits.
Employment
RD Process Integration • United Microelectronics Corporation
April, 2015 - Feb, 2022
- Conduct keys lots WAT yield analysis through logical reasoning and verify by SEM/TEM with FA team to find process issue in 14nm Finfet technology development from pre-production to mass-production
- Establish device characteristic procedure and train new colleagues quick hands-on
- Manage lot handle to ensure manufacturing quality in 14nm Finfet and 22nm platform technology
- Design Testkey with tools klayout, laker, UDD(user define device), boolean editor and qualify by DRC,PLC, LVS, XOR deck for process monitor in 14nm/22nm/28nm/40nm/MRAM tapeout
- Establish process flow in Power GaN HEMT by investigating worldwide e.g. iMEC and studying academic research e.g. NYCU, CGU for technical pathfinding
- Construct inline AFM methodology to monitor pGaN step-height for Vth, Ron improvement and inline TLM analysis to distinguish Ron into Rc, resistance of access region, resistance of gate for process stability control
- Lead pGaN, passivation loop and cowork with Wavetech, Unikorn,Episil and modules in Power GaN HEMT development to meet device target
- Self-study in academic program e.g. Semiconductor Physics and Devices, Electronics, Electromagnetics, Microwave Engineerings, Radio Frequency Amplifier Design
Education
National Cheng Kung University
Major in Material Science and Engineering
National Chung Hsing University
Major in Material Science and Engineering
Master degree
2012-2014
Bachelor degree
2008-2012
Standard Skills
- PowerPoint
- Excel
Special Skills
- Laker
- Klayout
- DRC
- LVS
Languages
- Chinese — Proficient
- English — Speaking/ Writing/ Reading: Intermediate