design. Build design module for a half-width motherboard. Build design module of PCI-E re-timer schematics and re-timer debug and troubleshooting . Developed 25/10GbE high speed Ethernet schematics and layout guide. Have experience of the overarching ODM project. 九月五月 2019 EducationNational Central University Master of PhysicsNational Dong Hwa University Bachelor of Physics Skills Language Cadence OrCAD Cadence Allegro Cadence Concept HDL Word、PowerPoint、Excel、Outlook Hardware Troubleshooting Hardware Development Verilog RTL coding based on Intel Altera CPLD Python coding for BOM check English — Advanced Mandarin — N ative speaker
Cadence OrCAD
Cadence Allegro
Cadence Concept HDL
Tertarik bekerja jarak jauh
4-6 tahun
National Central University
・
Master of Physics
Paket Perekrutan Paling Mudah dan Efektif, Pilihan Ratusan Perusahaan
Cari lebih dari 800 ribu CV dan ambil aksi menghubungi pelamar kerja untuk rekrutmen yang lebih efektif. Pilihan ratusan perusahaan.