1. uP/DSP system Architecture and digital circuit design.
2. Digital SOC design/integration, includes
- Floorplan, pinmux, and test mode
- RTL, SDC integration and relative checks including CDC, CCD, nLint and CLP
- Physical-aware clock/reset/mixed-mode/DFT architecture, design and verification
- Chip-level synthesis, DFT(SCAN/MBIST) insertion, LEC and STA

1. BS or MS degree in Computer Engineering or Electrical/Electronic Engineering
2. Familiar with at least one of the followings: computer architecture, MCU peripherals, chip security.
3. Familiar with digital IC design flow (design, verification, synthesis, physical implementation, tape-out check, HW/SW co-working)
4. Familiar with chip integration/physical implementation/IC tape-out, GDS out is a plus
5. Familiar with FPGA & ASIC verification flow is a plus
6. Familiar with system power analysis and low power design is a plus.
7. Familiar with WIFI or Bluetooth is a plus.