This position will join the CPU IP Design Team at Andes and will be part of the Functional Safety Team.

Primary Responsibilities Include
• Develop architecture specifications, perform digital design, verification and synthesis
• Work with field teams and product teams to evaluate customer requirements related to functional safety on Andes CPU Cores
• Develop safety plans to ensure compliance with ISO 26262 and its implementation.
• Work with cross-functional teams to develop safety concepts, DFA, DFMEA, qualitative and quantitative FMEDAs, Safety Manuals
• Collaborate with different stakeholders on functional safety
• Design and implement Safety Mechanisms for Andes CPU Cores
• Participate and Contribute to Functional Safety Audits

Must have skills:
• Experience with processor designs, cache controllers, ASIC/SoC designs
• Familiar with Andes or other CPU Cores
• Familiar with Industry standard interfaces like AMBA-AXI, AHB
• Familiar with design tools, like simulation, DFT, synthesis and timing analysis
• Familiar with ISO-26262
• Strong debugging and troubleshooting skills
• Excellent communication skills, teamwork skills, autonomy
• Ability to work simultaneously on multiple tasks
Has a strong desire to learn and explore new technologies. Demonstrates good analysis and problem-solving skills