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1.Micro-architecture / RTL design, simulation and verification 2.Chip integration, algorithm implementation or interface design. 3.Familiar CDC, synthesis, formality and STA flow 4. Familiar with FPGA integration, synthesis and verification. 5. Familiar with USB/ High-speed IO related project design is a plus

Job Responsibilities: Engage in RTL/Digital circuit design, synthesis, and simulation/verification. Conduct FPGA synthesis and verification processes. Manage chip integration, algorithm implementation, and interface design. Generate test patterns.

must have 3+ years experience creating visual design with a focus for interactive system. Implementation experience in a modern game engine, Unity preferred. Must present an online portfolio of relevant work for consideration. About the Team HTC Creative Labs is a global team of designers, artists, engineers, and researchers that delivers design strategy and incubates new products and experiences for the HTC portfolio. This team is responsible for much of HTC’s most significant design

SHL Medical is the world-leading solution provider in the design, development, and manufacturing of advanced drug delivery systems with more than 5000 employees worldwide. Our customers include top pharmaceutical and biotech companies from around the globe that require innovative devices such as auto injectors or pen injectors to effectively deliver their drugs. Headquartered in Switzerland since late 2018, with sites in Sweden, Taiwan, and the Unites States. 【Job Overview】 As an integral part o

Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.

Google welcomes people with disabilities. Minimum qualifications: Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of of experience in high-performance CPU or AI accelerator logic/RTL design including microarchitecture definition and Power Performance Area optimizations. Experience with CPU or AI accelerator integration with SOC. Preferred qualifications: PhD in Electrical Engineering or Computer S

Maintain and integrate PCIe/ USB3.2/USB4/ related IP and peripheral design. Verify PCIe/ USB3.2/USB4 related IP.

Lead the top-level integration of analog IPs, encompassing projects related to SSD, UFS, eMMC, SD, and more. Demonstrate a solid understanding of basic analog circuit design concepts, including but not limited to LDO, DCDC, BANDGAP, Voltage Detector, PLL, ADC, etc. Assist in conducting fail sample analysis and perform IC measurements to contribute to the identification and resolution of issues. If you have a background in analog IP integration, possess a strong grasp of analog circuit design

Duties and Responsibilities: Create website assets and other offline promotional campaigns. Ensure that tasks and projects are completed within given timeline. Utilize design advice and feedback effectively to improve designs.

Role & Responsibilities: Our primary Enterprise Resource Planning (ERP) system is CargoWise One (CW1). As the System Analyst for the Quotation Management System (QMS) module within CW1, your responsibilities include the following: Collaborate with the Project Manager to determine solution design, solution mapping, and project roadmap for the QMS module. Configure the package solution for the QMS module within CW1. Develop technical specifications, testing plans, and integration data flow. Overse