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4 到 6 年
RWTH Aachen University
・
Simulation Sciences
Senior Software Engineer @NVIDIA2023 ~ 现在
・
Software Developer
一個月內
/23 Have been using C++ as my primary programming language for 13 years. Now I follow the latest standards and even technical drafts to write expressive, high performing programs. Familiar with new language features like PMR, coroutines, parallel STL and Transactional Memory. High Performance Computing HPC coding skills. Developed libraries that takes advantage of OpenCL/Vulkan to run on the GPU for performance gain. I also have experience with OpenCL on FPGAs for building DNN accelerators. By extension, I'm also familiar with parallel computing on CPU, is neutral to
就职中
・
目前没有兴趣寻找新的机会
全职 / 对远端工作有兴趣
4 到 6 年
國立中山大學
・
CSE
Software Engineer @Wipro Limited2021 ~ 现在
・
Embedded Software Engineer
一個月內
Bug Triaging Tools, Sherlog. Solved the problem of high CPU load caused by Wireless routers when performing mesh speed test, and successfully reduced it by 30%. Zealogics LLC, Software Engineer, Nov 2020 ~ Aug 2021 Developed advanced electron E-beam inspection and pattern verification systems which use High-Performance Computing in advanced semiconductor devices. Program development uses CentOS, Docker, VSCode, Sourcetree, GitLab, Confluence, Bitbucket, Bamboo (CI/CD), VDI, Unit Test, Parallel Computing, Multithreading, Agile development. Engaged in the development of the cutting edge single-beam and multi-beam inspection systems. Compal Computer Industry Co.
就职中
・
目前没有兴趣寻找新的机会
全职 / 对远端工作有兴趣
6 到 10 年
National United University
・
Electronic Engineering就职中
全职 / 对远端工作有兴趣
4 到 6 年
National Cheng Kung University,
・
Statistics
Ingénieur assistant @Institut Camille Jordan de Lyon2014 ~ 2015
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Informatique
一年內
Abdoul Wahid Mainassara Doctorant Luxembourg District, Luxembourg Doctorant en informatique dans le domaine de l'optimisation de simulations numérique et du calcul haute performance (HPC). Je suis diplômé en ingénierie des mathématiques appliquées (méthode numérique, équations aux différentielles partielles, statistiques et géophysique). Je suis passionné par l'informatique, les mathématiques et la Formule 1. Langages de programmation : C/C++, Fortran, Python et Java Programmation parallèle : MPI, OpenMP, Cuda C++ Compétences: Calcul scientifique et numérique, Calcul haute performance, Systèmes distribués, Statistiques et Machine learning, Enseignement, Gestion de projet, Fort esprit d'analyse et
就学中
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4 到 6 年
Université Claude Bernard Lyon I / Ecole Centrale de Lyon
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Ingénierie mathématique
Consultant - Analytics @Thoucentric2020 ~ 2021
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CTO, Director Of IT, IT Architect
一個月內
Managed File Transfer, Pub-Sub Product, Technology & Vendor Evaluation, Risk management Process Enterprise Architecture Governance, Data Governance Technology Management, Stakeholder Management Quality & Compliance, System & Data Security Non Functional Requirement Management Product Planning and Designing Systems & Solution Architecture Scaled Agile, Scrum, Kanban Technology Microsoft Azure, AWS Cloud, Google Cloud Containerization , Kubernetes Parallel, Distributed & High-Performance Computing Cloud-Native Design and Azure Data Lake, HD Insights Mainframe Systems, COBOL Python, Databricks, Scikit-learn, Tensorflow System Design, API Design, REST, Middleware Terraform, Pulumi, Argo Work Experience Sr. Solution Architect Kimberly Clark, Data and Analytics • JulyCurrent Lead Architect for MLOps Platform : In-house
就职中
全职 / 对远端工作有兴趣
10 到 15 年
Dr. MGR Educational and Research Institute
・
Computer Science全职 / 对远端工作有兴趣
4 到 6 年
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1 到 2 年
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English
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Software Engineer
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全职
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台灣台北, 台灣新竹
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对远端工作有兴趣
接案服务
否
学历
学校
國立清華大學
主修科系
Computer Science
謝宗佐 (Tsung-Tso Hsieh)
[email protected] https://github.com/heyfey https://www.linkedin.com/in/tthsieh
(+886)975-923-670
Experience
Synopsys Inc.
Jan. 2022 - Present
Senior Software Engineer
VCS - Verilog Compile Simulator
C++, C, Compiler Optimization, Parallel Computing, Python
- Developed and supported debug functionality for SystemVerilog compile simulator
- Parallelized design traversal in FSDB waveform dumping, speeding up runtime by 3x with multithreading
- Optimized FSDB gate-data loading and reduced 10-60% runtime memory footprint, benefiting customers running hundreds-of-GB designs with tight memory budgets
- Initiated a project to migrate STL hash tables to Abseil Swiss tables for a millions-line code base, reducing up to 70% peak memory usage and speeding up hash table queries by 100%
- Debugged and resolved urgent customer issues in tight timelines (< 1 day TAT) with limited information, tools, and access to the environment
MediaTek Inc.
July 2020 - Aug. 2020
Software Engineer Intern
C, Python, Machine Learning
- Designed memory management algorithm & firmware for real-time embedded system
- Introduced machine learning and data visualization to automate issue analysis, saving 90% of human effort
Projects
GPU scheduler for elastic/distributed deep learning workloads in Kubernetes cluster
Golang, Python, Distributed Systems
- Architected and built a GPU scheduler using microservices architecture on top of Kubernetes and various open-source projects
- Sped up overall training time by 2.38x and increased cluster utilization by 1.4x with
- State-of-the-art scheduling algorithms with resource elasticity
- Topology-aware scheduling & worker migration to consolidate resources
- Designed and implemented heterogeneous scheduling, auto-scaling, and fault-tolerant mechanisms for the system
Publication
Tsung-Tso Hsieh, Che-Rung Lee: "Voda: A GPU Scheduling Platform for Elastic Deep Learning in Kubernetes Clusters", in IEEE International Conference on Cloud Engineering (IC2E), 2023
Education
National Tsing Hua University
Computer Science, M.S.
SCOPE Lab (Scientific Computing On Parallel Environment)
2019 - 2021
National Tsing Hua University
Double Major in Law and Computer Science, B.S.
2014 - 2018
謝宗佐 (Tsung-Tso Hsieh)
[email protected] https://github.com/heyfey https://www.linkedin.com/in/tthsieh
(+886)975-923-670
Experience
Synopsys Inc.
Jan. 2022 - Present
Senior Software Engineer
VCS - Verilog Compile Simulator
C++, C, Compiler Optimization, Parallel Computing, Python
- Developed and supported debug functionality for SystemVerilog compile simulator
- Parallelized design traversal in FSDB waveform dumping, speeding up runtime by 3x with multithreading
- Optimized FSDB gate-data loading and reduced 10-60% runtime memory footprint, benefiting customers running hundreds-of-GB designs with tight memory budgets
- Initiated a project to migrate STL hash tables to Abseil Swiss tables for a millions-line code base, reducing up to 70% peak memory usage and speeding up hash table queries by 100%
- Debugged and resolved urgent customer issues in tight timelines (< 1 day TAT) with limited information, tools, and access to the environment
MediaTek Inc.
July 2020 - Aug. 2020
Software Engineer Intern
C, Python, Machine Learning
- Designed memory management algorithm & firmware for real-time embedded system
- Introduced machine learning and data visualization to automate issue analysis, saving 90% of human effort
Projects
GPU scheduler for elastic/distributed deep learning workloads in Kubernetes cluster
Golang, Python, Distributed Systems
- Architected and built a GPU scheduler using microservices architecture on top of Kubernetes and various open-source projects
- Sped up overall training time by 2.38x and increased cluster utilization by 1.4x with
- State-of-the-art scheduling algorithms with resource elasticity
- Topology-aware scheduling & worker migration to consolidate resources
- Designed and implemented heterogeneous scheduling, auto-scaling, and fault-tolerant mechanisms for the system
Publication
Tsung-Tso Hsieh, Che-Rung Lee: "Voda: A GPU Scheduling Platform for Elastic Deep Learning in Kubernetes Clusters", in IEEE International Conference on Cloud Engineering (IC2E), 2023
Education
National Tsing Hua University
Computer Science, M.S.
SCOPE Lab (Scientific Computing On Parallel Environment)
2019 - 2021
National Tsing Hua University
Double Major in Law and Computer Science, B.S.
2014 - 2018