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R&D process integration engineer @ UMC
2014 ~ 2022
Semiconductor Engineer
超過一年
Excel
reliability
Process Integration
待业中
目前没有兴趣寻找新的机会
全职 / 对远端工作有兴趣
10 到 15 年
National Yang Ming Chiao Tung University
Electrical Engineering & IC design
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External Manufacturing Manager @ONsemiconductor
2018 ~ 现在
Managing Director
超過一年
In process control (stability), process capability best practice cross fertilization management. • Promoting yield improvement and systematically feedback information to new product development team, PDCA cycle review. • Actively identify scrap saving opportunities. • Process optimization related to yield loss caused by strict customer requirements and quality case. • Be yield enhancement hub for technical assessment from IC circuit design, wafer manufacturing, assembly, test and OSAT capability evaluation. • Initiate taskforces to drive OSAT on multi-dimensional tasks including customer voice, quality focus, production sustaining. • Lead continuous improvement program to achieve excellent yield and quality performance. • Drive yield
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6 到 10 年
National Chiao Tung University, Hsinchu, Taiwan, Republic of China
Material Science and Engineering
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曾任
研發工程師 @新日興股份有限公司
2021 ~ 2023
機械工程師,半導體製程工程師,半導體設備工程師,
一個月內
Word
PowerPoint
Excel
待业中
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國立台北科技大學
Materials Science and Engineering
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Test Equipment Technician @Micron Technology 台灣美光
2018 ~ 现在
製程工程師、設備工程師、半導體工程師
一個月內
吳明赫 Test Equipment Technician Taichung City, Taiwan Passionate about continuous learning and professional growth, good at working effectively under pressure, with 10 years of experience in semiconductor back-end equipment. Demonstrates excellence in equipment maintenance, upkeep, improvements and capability enhancements. 工作經歷 Test Equipment Technician Micron Technology 台灣美光 • 十一月Present # Leadership Daily *improvement Equipment UPH/PPJ/MTBF/SDT/UDT KPI, until meet target *Mentor other equipment engineers in the respective area *Support edit/improve Equipment...OCAP/Procedure/SOP
Microsoft Office
critical thinking
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10 到 15 年
南台科技大學
電機工程系
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曾任
Process Integration Engineer @TSMC Fab12B
2019 ~ 2021
Yield Improvement Engineer
超過一年
Shih Heng Sun Semiconductor Process Integration Engineer with 5+ years of experience. TSMC PIE specializing in advanced technology semiconductor products (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield analysis, and collaborating with production line to solve problems. Making a huge leap for TSMC advanced IC fabrication in process integration and yield improvement. Enthusiastic about semiconductor product development and design which can change people's lives. Work Experiences Yield Improvement Engineer • TSMC Fab12B AugustDecember 2020 Expert in most advanced Logic IC process (5nm~10nm) and familiar with advanced measuring
Communicating
Measuring Instruments
Semiconductor Process
待业中
全职 / 对远端工作有兴趣
4 到 6 年
National Taiwan University
M.S. Photonics and Optoelectronics
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Project Enginner @ASE Technology Holding Co., Ltd.
2019 ~ 现在
QA Engineer
超過一年
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6 到 10 年
國立嘉義大學
應用數學, 統計
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系統架構師
超過一年
藍景耀 Ace Lan City: Taiwan Taipei (ROC) Mail: [email protected] Phone:Introduction Hi, my name is Ace Lan, I took this English name by myself it's expected I can become a top on work field. I was familiar with Java solution,and I had a bachelor's degree in Information technology, and a Master's degree in Accounting. For programming language, I was focus on Java programming.but any programming language that I can study very quick, therefore , I think different programming language that is not a problem to me .
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MySQL
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4 到 6 年
國立成功大學
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超過一年
Yield Improvement Engineer
TSMC Fab12B
2019 ~ 2021
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求职阶段
专业
电机工程师, 产品工程师
产业
消费性电子产品
工作年资
4 到 6 年
管理经历
技能
Communicating
Measuring Instruments
Semiconductor Process
Property Analysis
Field Inspection
Data Analysis
Word
PowerPoint
Excel
语言能力
English
进阶
Chinese
母语或双语
求职偏好
希望获得的职位
Yield Improvement Engineer
预期工作模式
全职
期望的工作地点
Taipei, 台灣, Zhubei, Zhubei City, Hsinchu County, Taiwan
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接案服务
学历
学校
National Taiwan University
主修科系
M.S. Photonics and Optoelectronics
列印

Shih Heng Sun

Semiconductor Process Integration Engineer with 5+ years of experience.

TSMC PIE specializing in advanced technology semiconductor products (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield analysis, and collaborating with production line to solve problems. Making a huge leap for TSMC advanced IC fabrication in process integration and yield improvement. Enthusiastic about semiconductor product development and design which can change people's lives.

    

Work Experiences

Yield Improvement Engineer  •  TSMC Fab12B

August 2016 - December 2020

Expert in most advanced Logic IC process (5nm~10nm) and familiar with advanced measuring instruments such as SEM, E-beam and Bright/Dark Field Inspection Tool.
Specialized in detecting defects to improve yield.
Collaborated with EE & PE to refine logic IC manufacturing procedure and lower production cost.

Process Integration Engineer  •  TSMC Fab12B / TSMC R&D

May 2019 - December 2019 / January 2021 - December 2021 

Proficient in analyzing the relationship between chip electrical properties and process problems.
Specialized in using electrical data analysis (3nm~5nm) to improve Logic IC performance
Experienced in hitherto the most advanced semiconductor process (3nm).

Education

2013/09 - 2016/07

National Taiwan University

M.S. Photonics and Optoelectronics

2006/09 - 2010/06

National Taiwan University

B.S. Physics

Graduate Research

Enhancement of Emission Efficiency of Deep-ultraviolet AlGaN Quantum Wells through Surface Plasmon Coupling with an Al Protrusion Array

Skills


  • Semiconductor electrical property analysis
  • Advanced metrology tools (SEM, DB/DD and E-beam)
  • Excellent in problem-solving
  • Capable of both working on teams and individual
  • Influential communicating and reporting skills

Languages


  • English — Fluent
  • Chinese — Native
简历
个人档案

Shih Heng Sun

Semiconductor Process Integration Engineer with 5+ years of experience.

TSMC PIE specializing in advanced technology semiconductor products (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield analysis, and collaborating with production line to solve problems. Making a huge leap for TSMC advanced IC fabrication in process integration and yield improvement. Enthusiastic about semiconductor product development and design which can change people's lives.

    

Work Experiences

Yield Improvement Engineer  •  TSMC Fab12B

August 2016 - December 2020

Expert in most advanced Logic IC process (5nm~10nm) and familiar with advanced measuring instruments such as SEM, E-beam and Bright/Dark Field Inspection Tool.
Specialized in detecting defects to improve yield.
Collaborated with EE & PE to refine logic IC manufacturing procedure and lower production cost.

Process Integration Engineer  •  TSMC Fab12B / TSMC R&D

May 2019 - December 2019 / January 2021 - December 2021 

Proficient in analyzing the relationship between chip electrical properties and process problems.
Specialized in using electrical data analysis (3nm~5nm) to improve Logic IC performance
Experienced in hitherto the most advanced semiconductor process (3nm).

Education

2013/09 - 2016/07

National Taiwan University

M.S. Photonics and Optoelectronics

2006/09 - 2010/06

National Taiwan University

B.S. Physics

Graduate Research

Enhancement of Emission Efficiency of Deep-ultraviolet AlGaN Quantum Wells through Surface Plasmon Coupling with an Al Protrusion Array

Skills


  • Semiconductor electrical property analysis
  • Advanced metrology tools (SEM, DB/DD and E-beam)
  • Excellent in problem-solving
  • Capable of both working on teams and individual
  • Influential communicating and reporting skills

Languages


  • English — Fluent
  • Chinese — Native