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• 面板驅動IC 或 SoC 設計

1.Creating verification plans of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios. 2.Create verification environments using SystemVerilog, SystemC or UVM. 3.Identify and write all types of coverage measures for stimulus and corner-cases. 4.Debug tests with design engineers to deliver functionally correct design blocks. 5. Close coverage measures to identify verification holes and to sh

1.Front-End/Modem (Baseband) Architecture Design for WiFi6/BT/BLE systems; 2.Optimization of Frontend/Modem circuits and simulation/verifications; 3.Digital Circuit Design and Verification – RTL Coding/Synthesis/STA/…

TESDA, a fast growing startup is looking for manager with 5+ years experience and 1~5 digital design verification engineers. As a design verification engineer at TESDA, you'll be able to access and verify the design and implementation of hugely complex SoC from world class companies,attractive package and stock options. If you are looking for a position that can offer huge growth opportunity for career and personal finance and work-life balance, TESDA is the

We are looking for a talented UX/UI Designer to create amazing user experiences. The ideal candidate should have an eye for clean and artful design, possess superior UI skills and be able to translate high-level requirements into interaction flows and artifacts, and transform them into beautiful, intuitive, and functional user interfaces. Purpose of Role ● The successful candidate will be a self-driven digital product designer with experience in mobile apps ● The candidate will

將品牌識別延伸數位設計呈現，是版塊的核心也是最重要的事情！重視品牌精神、透過品牌識別思維深度與設計手法廣度，引入動態特效的加值，呈現吸睛且留下印象深刻的經典畫面，這就是版塊

1. ASIC Design or IP Integration 2. Familiar with Digital front-end EDA tool.

面板驅動IC或SOC設計 影像處理與影像壓縮設計 高速介面數位控制(如MIPI/ISP等)

Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with microprocessor architecture. Preferred qualifications: Master's degree or PhD in Electrical Engineering or Computer Science. Experience with modern pro

工作內容 Knowledge of System Verilog, digital simulation and debug. Exposure to UVM is desired. Familiar with USB design is a plus. DV Experience: 6~10 years 薪資架構 13個月計算, RSU 另計