shih-heng sun
Yield Improvement Engineer
TSMC PIE specializing in
advanced tech. semiconductor process (3nm~10nm). Well-versed in yield improvement of semiconductor manufacturing process, Logic IC yield
analysis, and collaborate with production line to solve problems . Made a huge leap for
TSMC advanced IC chip defect detection and yield improvement. Enthusiastic about
semiconductor product development and design which can change people's lives.
TSMC Fab12B
National Taiwan University
專業背景
- 目前狀態待業中
- 專業電機工程師・產品工程師
- 產業消費性電子產品
- 工作年資4 到 6 年 (4 到 6 年相關工作經驗)
- 管理經歷無
- 技能
- 語言能力English・進階Chinese・母語或雙語
- 最高學歷碩士
求職偏好
- 預期工作模式全職・對遠端工作有興趣
- 希望獲得的職位Yield Improvement Engineer
- 期望的工作地點Taipei, 台灣・Zhubei, Zhubei City, Hsinchu County, Taiwan
- 接案服務不提供接案服務
工作經驗
Process Integration Engineer
Hsinchu, Hsinchu City, Taiwan
Proficient in analyzing the relationship between chip electrical properties and process problems.
Specialized in using electrical data analysis 3 nm - 5 nm to improve Logic IC performance
Experienced in hitherto the most advanced semiconductor process 3 nm .
Yield Improvement Engineer
Hsinchu, Hsinchu City, Taiwan
Expert in most advanced Logic IC process 5 nm - 10 nm and Familiar with advanced measuring instruments SEM, E-beam and Bright/Dark Field Inspection Tool
Specialized in detecting defects to improve yield
Collaborated with EE & PE to refine Logic IC manufacturing procedure and lower production cost.
學歷
Master’s Degree
・
M.S. Photonics and OptoelectronicsBachelor’s Degree
・
B.S. Physics