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Logo of CakeResume Headhunting Recruitment Service.
1. ASIC Design or IP Integration 2. Familiar with Digital front-end EDA tool.
IP Integration
IP Design
Digital IC
180萬 ~ 250萬 TWD / 年
需具備 3 年以上工作經驗
不需負擔管理責任
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with microprocessor architecture. Preferred qualifications: Master's degree or PhD in Electrical Engineering or Computer Science. Experience with modern pro
經常性薪資達 NT$40,000
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. Experience with microprocessor architecture. Experience with logic design. Preferred qualifications: Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience. Experience with modern processor microarchitecture and related technologies
經常性薪資達 NT$40,000
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques. Experience with CPU or AI accelerator
經常性薪資達 NT$40,000
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 10 years of of experience in high-performance CPU or AI accelerator logic/RTL design including microarchitecture definition and Power Performance Area optimizations. Experience with CPU or AI accelerator integration with SOC. Preferred qualifications: PhD in Electrical Engineering or Computer S
經常性薪資達 NT$40,000
Logo of Google.
Google welcomes people with disabilities. Note: By applying to this position you will have an opportunity to share your preferred working location from the following: New Taipei, Banqiao District, New Taipei City, Taiwan; Taipei, Taiwan . Minimum qualifications: Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. Experience verifying digital logic at RTL using SystemVerilog for ASICs. Experience verifying digital systems using standard IP componen
經常性薪資達 NT$40,000
Logo of 美商綠銅科技有限公司臺灣分公司.
Verdigris is on a mission to sustain and enrich human life through responsive energy intelligence. We automate energy management and predict unseen equipment failures in mission-critical buildings. This is a critical step for autonomous, sustainable environments responsive to their inhabitants. Extraordinary outcomes need exceptional teams. As a company, we value collaborating and growing. About you As a Hardware Lead, your #1 goal is hardware product design and revision. You also represent the
EE
embedded system
Manufacturing Experience
184.5萬 ~ 246萬 TWD / 年
不需負擔管理責任
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with low-power dynamic and leakage, power estimation, as well as data analytics, and profiling. Experience in flow automation (e.g., Python, C, C++). Pre
經常性薪資達 NT$40,000
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with microprocessor architecture. Experience with logic synthesis techniques to optimize RTL code, performance, power, and design techniques. Preferred qual
經常性薪資達 NT$40,000
Logo of 賽博朋克科技有限公司.
Responsibilities ● Build high quality testable, reusable and efficient code on a consistent basis ● Take initiative in improving our existing product in order to address pain points in your own experience as a developer. ● Able to learn and adapt to a rapidly evolving tech stack ● Collaborate with Front-end developers to integrate user-facing elements with server side logicDesign and implement low-latency, high-availability and performance applications. ● Integration of data storage
Node.js
TypeScript
7.9萬 ~ 13萬 TWD / 月
不需負擔管理責任

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