CakeResume
CakeResume Logo
サインイン
サインアップ
Build your Network
My Network
Access your personal network connections and manage your contacts.
CakeResume Meet
Expand your professional network by meeting and connecting with other users.
Community
Engage with other users through discussions, forums, and networking events.
サインイン
サインアップ
Avatar of TienYaoHsu.
TienYaoHsu
Senior FAE
ProfilePortfolio
Posts
0Connections
印刷
Avatar of the user.

TienYaoHsu

Senior FAE
I am confident that the combination of solid engineering background, a variety of practical work experience, and good RTL coding skills has prepared me for being an excellent FPGA engineer. I am responsible for server and switch supporting and help customers survey suitable FPGA for their circuit design.
WEIKENG INDUSTRIAL CO., LTD
National Kaohsiung First University of Science and Technology
台灣新竹市新竹

Professional Background

  • 現在の状況
  • Profession
    Other
  • Fields
    Hardware
  • 職務経験
    6〜10年 (4〜6年関連の実務経験)
  • Management
  • Skills
    Verilog HDL
    ModelSim
    Xilinx VIVADO
    Lattice Diamond
    Altera Quartus
  • Highest level of education
    Master

Job search preferences

  • Desired job type
    フルタイム
    ・
    リモートワークに興味あり
  • Desired positions
    FPGA engineer
  • 希望の勤務地
  • Freelance

Work Experience

Senior FAE

WEIKENG INDUSTRIAL CO., LTD
2月 2016 - 現在
1. Verilog coding/modification for the customer. 2. Function simulation. 3. FPGA engineering support. 4. FPGA board level debug. 5. Familiar with I2C master/slave, UART, PWM, and TACH. 6. Good knowledge of server and switch architecture. 7. The power sequence coding for Intel or AMD CPU/SOC.

Senior Engineer

AUO
10月 2013 - 11月 2015
・
2 yrs 2 mos
1. Optimization improves the performance of display optical. 2. The peripheral circuit design of the display panel module. 3. Verilog coding. 4. Keil C coding.

Hardware Engineer

CASwell, Inc.
10月 2012 - 9月 2013
・
1 yr 0 mos
1. Designing PCB circuit of the Intel x86 platform. 2. To debug the circuit with an oscilloscope.

ZyXEL

Maintenance Assistant Engineer
4月 2007 - 8月 2010
・
3 yrs 5 mos
1. FTTx and DSLAN debugging, troubleshooting and testing. 2. Process and provide RMA services.

Education

National Kaohsiung First University of Science and Technology

Master’s Degree
・
Computer and Communication Engineering
2010 - 2012

National Chin-Yi University of Technology

Bachelor’s Degree
・
Electrical Engineering
2003 - 2005

National Chin-Yi University of Technology

Associate’s Degree
・
Electrical Engineering
2001 - 2003