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TienYaoHsu
Senior FAE
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TienYaoHsu

Senior FAE
I am confident that the combination of solid engineering background, a variety of practical work experience, and good RTL coding skills has prepared me for being an excellent FPGA engineer. I am responsible for server and switch supporting and help customers survey suitable FPGA for their circuit design.
WEIKENG INDUSTRIAL CO., LTD
National Kaohsiung First University of Science and Technology
台灣新竹市新竹

Latar Belakang Profesional

  • Status sekarang
  • Profesi
    Lainnya
  • Bidang
    Hardware
  • Pengalaman Kerja
    6-10 tahun (relevan 4-6 tahun)
  • Management
  • Skil
    Verilog HDL
    ModelSim
    Xilinx VIVADO
    Lattice Diamond
    Altera Quartus
  • Pendidikan tertinggi
    Master

Preferensi pencarian kerja

  • Jenis pekerjaan yang diinginkan
    Full-time
    Tertarik bekerja jarak jauh
  • Jabatan pekerjaan yang diinginkan
    FPGA engineer
  • Lokasi pekerjaan yang diinginkan
  • Bekerja lepas

Pengalaman Kerja

Senior FAE

02/2016 - Sekarang
1. Verilog coding/modification for the customer. 2. Function simulation. 3. FPGA engineering support. 4. FPGA board level debug. 5. Familiar with I2C master/slave, UART, PWM, and TACH. 6. Good knowledge of server and switch architecture. 7. The power sequence coding for Intel or AMD CPU/SOC.

Senior Engineer

10/2013 - 11/2015
2 yrs 2 mos
1. Optimization improves the performance of display optical. 2. The peripheral circuit design of the display panel module. 3. Verilog coding. 4. Keil C coding.

Hardware Engineer

10/2012 - 09/2013
1 yr 0 mos
1. Designing PCB circuit of the Intel x86 platform. 2. To debug the circuit with an oscilloscope.

ZyXEL

04/2007 - 08/2010
3 yrs 5 mos
1. FTTx and DSLAN debugging, troubleshooting and testing. 2. Process and provide RMA services.

Edukasi

Master
Computer and Communication Engineering
2010 - 2012
Sarjana
Electrical Engineering
2003 - 2005
D3
Electrical Engineering
2001 - 2003