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Logo of Morgan Philips Group.
Job Responsibilities: Engage in RTL/Digital circuit design, synthesis, and simulation/verification. Conduct FPGA synthesis and verification processes. Manage chip integration, algorithm implementation, and interface design. Generate test patterns.
1M ~ 3M TWD / year
3 years of experience required
No management responsibility
Logo of SHL Medical 瑞健股份有限公司.
【Main Responsibilities】 As a verification/product engineer, you will participate in the product development project and responsible for the followings: • Develop engineering test plan in the early phase of product development to provide direction to adjusting the design • Support realizing design prototype • Reviewing the product designs and noting likely points of failure. • Reviewing existing engineering criteria for similar products. • Meeting with product designers and apply regulatory stand
40K+ TWD / month
1 years of experience required
No management responsibility
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. 3 years of experience in physical design. Experience in high-performance, low-power physical design and implementation techniques with industry standard synthesis and PnR tools. Experience in one or more sign-off convergence within the STA electrical checks and physical verification domains. Preferred qualifications: 3 years of ind
Regular earnings reach NT$40,000
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. 8 years of experience in physical design. Experience in one or more sign-off convergence in Static Timing Analysis (STA) electrical checks and physical verification domains. Experience in high-performance, low-power physical design and implementation techniques with industry standard synthesis and PnR tools. Preferred qualification
Regular earnings reach NT$40,000
Logo of Google.
Google welcomes people with disabilities. Minimum qualifications: Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience. 15 years of experience in physical design. Experience in multiple sign-off convergence activities like STA, electrical checks and physical verification domains. Experience in high-performance, low-power physical design and implementation techniques with industry standard synthesis and PnR tools. Preferred qualifications: 3 years of e
Regular earnings reach NT$40,000
Logo of NVIDIA.
We are now looking for a ASIC Verification Engineer - Coherent High Speed Interconnect! For two decades, we have pioneered visual computing, the art and science of computer graphics. With our invention of the GPU - the engine of modern visual computing - the field has grown to encompass video games, movie production, product design, medical diagnosis, and scientific research. Today, we stand at the beginning of the next era, the AI computing era, ignited by a new computing model, GPU
Testbenches
C++
PCIE
5 years of experience required
No management responsibility
Logo of Andes Technology 晶心科技.
1. Verify RISC-V SOC platform including bus fabric, peripheral IPs: SPI, UART, I2C, PWM…etc. 2. Build testbench, develop and maintain in-house VIP 3. Create rand constraint conditions, analysis coverage holes and fill them 4. Create function coverage points to make sure all functions are under test
Verilog
C
C++
50K ~ 150K TWD / month
No requirement for relevant working experience
No management responsibility
Logo of Ali Tech.
1.Front-End/Modem (Baseband) Architecture Design for WiFi6/BT/BLE systems; 2.Optimization of Frontend/Modem circuits and simulation/verifications; 3.Digital Circuit Design and Verification – RTL Coding/Synthesis/STA/…
C++
FPGA
ASIC
1.8M ~ 2.3M TWD / year
No management responsibility
Logo of 智微科技股份有限公司.
1. Verify RTL design with System Verilog and UVM verification methodology. 2. PCIe or USB or SATA related VIP test maintenance and development. 3. Develop verification platform or behavioral models. 4.Test planning, testbench documentation and development.
Verilog
60K ~ 80K TWD / month
No management responsibility
Logo of 印正有限公司 Yins Corp.
The HW system application engineer is responsible for IC verification system platform development which is used for CMOS image sensor applications. Responsibilities include HW system circuit design, layout and manufacturing for IC characterization and verification. 需出差,一年累積時間未定。
40K ~ 200K TWD / month
3 years of experience required
No management responsibility

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