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Logo of NVIDIA.
NVIDIA is looking for a Senior Design Engineer for our Coherent High Speed Interconnect team! The NVLINK-C2C enables the creation of a new class of integrated products with NVIDIA partners, built via chiplets, allowing NVIDIA GPUs, DPUs, and CPUs to be coherently interconnected with custom silicon. To learn more about NVIDIA's ultra-fast chip interconnect technology visit: https://www.nvidia.com/en-us/data-center/nvlink-c2c/ . This
Verilog
TGC Europe
5 years of experience required
No management responsibility
Logo of NVIDIA.
We are now looking for a Research Scientist - Circuits - New College Graduate. Advanced circuit design is critically important in the post-Moore’s Law age. Without the ability to scale process to increase performance and reduce power, we must rely more and more on creative architectural and underlying circuit solutions to provide continuing advancement from generation to generation. NVIDIA Research is seeking world-class circuit researchers to contribute to the exploration of future high-perform
Verilog
PLL
TGC Europe
No requirement for relevant working experience
No management responsibility
Logo of Andes Technology 晶心科技.
1. Verify RISC-V SOC platform including bus fabric, peripheral IPs: SPI, UART, I2C, PWM…etc. 2. Build testbench, develop and maintain in-house VIP 3. Create rand constraint conditions, analysis coverage holes and fill them 4. Create function coverage points to make sure all functions are under test
Verilog
C
C++
50K ~ 150K TWD / month
No requirement for relevant working experience
No management responsibility
Logo of 台灣電子設計自動化股份有限公司.
TESDA, a fast growing startup is looking for manager with 5+ years experience and 1~5 digital design verification engineers. As a design verification engineer at TESDA, you'll be able to access and verify the design and implementation of hugely complex SoC from world class companies,attractive package and stock options. If you are looking for a position that can offer huge growth opportunity for career and personal finance and work-life balance, TESDA is the
Verilog
SystemVerilog
C/C++
80K ~ 200K TWD / month
5 years of experience required
Managing 5-10 staff
Logo of NVIDIA.
We are now looking for a Senior Research Scientist - Circuits. Advanced circuit design is critically important in the post-Moore’s Law age. Without the ability to scale process to increase performance and reduce power, we must rely more and more on creative architectural and underlying circuit solutions to provide continuing advancement from generation to generation. NVIDIA Research is seeking world-class circuit researchers to contribute to the exploration of future high-performance, low-power
Verilog
PLL
TGC Europe
No requirement for relevant working experience
No management responsibility
Logo of WASAI Technology.
* Design and develop OpenCL/HLS/CUDA algorithms for HPC platform. * Defines and documents OpenCL/HLS/CUDA algorithms required for emulation/FPGA. * Tests and debugs the emulation/FPGA model and collaterals. * Develops improvements to usability by digital circuit validation and debugging of failing tests on the emulation platform. *You will join a growing team of digital IC design engineering professionals and have a real opportunity to have your hardware solutions
C
C++
OpenCL
80K ~ 150K TWD / month
No requirement for relevant working experience
No management responsibility
Logo of Salcomp.
工程師、PM、廠商、工廠端合作專案所需任務。 4.根據市場趨勢導入新技術至專案中。 【工作說明】 1.Digital power control ,如PFC, Totem Pole PFC, LLC, PSFB等架構的韌體控制與應用 2.Housekeeping IC 相關韌體控制與應用 3.MCU(TI / ST
Firmware
powersupply
60K ~ 100K TWD / month
1 years of experience required
No management responsibility

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